1. Field of the Invention
This invention relates generally to design verification. More particularly, this invention relates to a memory model to support verification of functional verification of multi-processor systems.
2. Description of the Related Art
TABLE 1Acronyms and AbbreviationsCSPConstraint Satisfaction ProblemDMADirect Memory AccessDUTDesign-Under-TestSoCSystem on a Chip
An important aspect of designing an advanced computer system having multiple processors is the ability to test the design of the processors thoroughly, in order to assure that the design complies with desired architectural, performance and design specifications. One known verification technique requires the generation of a large number of instruction sequences to assure that the processors behave properly under a wide variety of circumstances.
Test program generators are basically sophisticated software engines, which are used to create numerous test cases. By appropriate configuration, it is possible for test generation to be focused on very specific ranges of conditions, or broadened to cover a wide range of logic. Today, large numbers of test cases can be created automatically in the time that a single test case could be written manually, as was done prior to the advent of test case generators.
An example of a conventional test program generator is the IBM tool, Genesys, which is disclosed in the document Model-Based Test Generation for Process Design Verification, Y. Lichtenstein et al., Sixth Innovative Applications of Artificial Intelligence Conference, August 1994, pp. 83-94. An updated version, of Genesys, known as Genesys-Pro, is a generic random test generator, targeted at the architectural level and applicable to any architecture.
Another conventional test program generator, AVPGEN, is disclosed in the document AVPGEN-A Generator for Architecture Verification Test Cases, A. Chandra, et al., IEEE Trans. Very Large Scale Integration (VLSI) Syst. 3, No. 2, pp. 188-200 (June 1995).
X-Gen, a model-based test-case generator, is described in the document X-Gen, a random test-case generator for systems and SoCs, R. Emek, et al., Seventh IEEE International High-Level Design Validation and Test Workshop (HLDVT 2002). This test generator is specialized for use with multiprocessor systems and systems on a chip (SoCs). X-Gen provides a framework and a set of building blocks for system-level test-case generation. Test program generation using X-Gen typically involves the resolution of constraints to make the tests legal and interesting for verification.